Along with the means of arithmetic calculations, the microprocessor command system also has means of logical data conversion. Logical means such data transformations, which are based on rules of formal logic.

Formal logic works at the level of true and false statements. For a microprocessor, this usually means 1 and 0, respectively. For a computer, the language of zeros and ones is native, but the minimum unit of data with which machine instructions work is a byte. However, at the system level, it is often necessary to be able to operate at an extremely low level - at the bit level.

Rice. 29. Means of logical data processing

The means of logical data transformation include logical commands and logical operations. The operand of an assembler instruction can generally be an expression, which in turn is a combination of operators and operands. These operators may include operators that implement logical operations on expression objects.

Before examining these tools in detail, let us consider what the logical data themselves are and what operations are performed on them.

Logical data

The theoretical basis for logical data processing is formal logic. There are several systems of logic. One of the most famous is calculus of statements. A statement is any statement that can be said to be either true, or false.

Propositional calculus is a collection of rules used to determine whether a combination of propositions is true or false.

Propositional calculus is very harmoniously combined with the principles of the computer and the basic methods of its programming. All hardware components of a computer are built on logic chips. The system for presenting information in a computer at the lowest level is based on the concept of a bit. A bit, with only two states (0 (false) and 1 (true)), naturally fits into the propositional calculus.

According to the theory, the following logical operations can be performed on statements (on bits).

1. Negation (logical NOT) - a logical operation on one operand, the result of which is the reciprocal of the value of the original operand.

This operation is uniquely characterized by the following truth table (Table 12).

Table 12. Truth table for logical negation

2. Logical addition (logical inclusive OR) - a logical operation on two operands that evaluates to true (1) if one or both operands are true (1), and false (0) if both operands are false (0).

This operation is described using the following truth table (Table 13).

Table 13. Truth table for logical inclusive OR

3. Logical multiplication (logical AND) - a logical operation on two operands that evaluates to true (1) only if both operands are true (1). In all other cases, the value of the operation is "false" (0).

This operation is described using the following truth table (Table 14).

Table 14. Truth table for logical AND

4. Logical exclusive addition (logical exclusive OR) - a logical operation on two operands, the result of which is true (1) if only one of the two operands is true (1), and false (0) if both operands are false (0) or truth "(1). This operation is described using the following truth table (tab. 15).

Table 15. Truth table for logical exclusive OR

The microprocessor command set contains five commands that support these operations. These instructions perform logical operations on the bits of the operands. The size of the operands, of course, must be the same. For example, if the dimension of the operands is equal to a word (16 bits), then the logical operation is performed first on the zero bits of the operands, and its result is written in place of bit 0 of the result. Then the command sequentially repeats these actions over all bits from the first to the fifteenth.

Logic commands

In the microprocessor command system, there is the following set of commands that support work with logical data:

1) and operand_1, operand_2 is a logical multiplication operation. The instruction performs a bitwise logical AND operation (conjunction) on the bits of the operands operand_1 and operand_2. The result is written in place of operand_1;

2) og operand_1, operand_2 is a logical addition operation. The instruction performs a bitwise logical OR (disjunction) operation on the bits of operands operand_1 and operand_2. The result is written in place of operand_1;

3) hog operand_1, operand_2 - operation of logical exclusive addition. The instruction performs a bitwise logical XOR operation on the bits of the operands operand_1 and operand_2. The result is written in place of the operand;

4) test operand_1, operand_2 - operation "check" (by means of logical multiplication). The instruction performs a bitwise logical AND operation on the bits of operands operand_1 and operand_2. The state of the operands remains the same, only the flags zf, sf, and pf are changed, which makes it possible to analyze the state of individual bits of the operand without changing their state;

5) not operand is a logical negation operation. The instruction performs a bitwise inversion (replacement of the value with the opposite) of each bit of the operand. The result is written in place of the operand.

To understand the role of logical instructions in the system of microprocessor instructions, it is very important to understand the areas of their application and typical techniques for using them in programming.

With the help of logical commands it is possible excretion individual bits in the operand in order to setting, resetting, inverting or just checking for a specific value.

To organize such work with bits, operand_2 usually plays the role of a mask. Using the bits of this mask set to 1, the bits of operand_1 required for a specific operation are determined. Let's show what logical commands can be used for this purpose:

1) to set certain bits (bits) to 1, use the command o operand_1, operand_2.

In this command, operand_2, which acts as a mask, must contain one bits in place of those bits that should be set to 1 in operand_1;

2) to reset certain bits (bits) to 0, use the command and operand_1, operand_2.

In this command, operand_2, which acts as a mask, must contain zero bits in place of those bits that should be set to 0 in operand_1;

3) instruction hog operand_1, operand_2 is applied:

a) to find out which bits in operand_1 and operand differ;

b) to invert the state of the specified bits into operand_1.

The bits of the mask (operand_2) of interest to us when executing the hog command must be one, the rest - zero;

To check the status of the set bits, use the command test operand_1, operand_2 (check operand_1).

The checked bits of operand_1 in the mask (operand_2) must have one value. The algorithm of the test command is similar to that of the and command, but it does not change the value of operand_1. The result of the command is to set the value of the zf flag to zero:

1) if zf = 0, then as a result of logical multiplication a zero result was obtained, i.e. one single bit of the mask, which did not coincide with the corresponding one bit of the operand;

2) if zf = 1, then as a result of logical multiplication a nonzero result is obtained, i.e. at least one the one bit of the mask matches the corresponding one bit of operand_1.

To react to the result of the test command, it is advisable to use the jnz label command (Jump if Not Zero) - a jump if the zf zero flag is nonzero, or a command with the opposite action - jz label (Jump if Zero) - a jump if the zero flag zf = 0.

The next two commands search for the first bit of the operand set to 1. The search can be performed both from the beginning and from the end of the operand:

1) bsf operand_1, operand_2 (Bit Scaning Forward) - bit scanning forward. The command scans (scans) the bits of operand_2 from low to high (from bit 0 to high bit) in search of the first bit set to 1. If found, the number of this bit is entered into operand_1 as an integer value. If all bits of operand_2 are 0, then the zero flag zf is set to 1, otherwise the zf flag is cleared to 0;

2) bsr operand_1, operand_2 (Bit Scaning Reset) - scanning of bits in reverse order... The command scans (scans) the bits of operand_2 from high-order to low-order (high-order bit to bit 0) in search of the first bit set to 1. If one is found, the number of this bit is entered into operand_1 as an integer value. It is important that the position of the first one bit from the left is counted anyway relative to bit 0. If all bits of operand_2 are equal to 0, then the zero zf flag is set to 1, otherwise the zf flag is reset to 0.

In the latest models of Intel microprocessors, in the group of logical instructions, several more instructions have appeared that allow access to one specific bit of the operand. The operand can be in memory or in a register general purpose... The bit position is set by offsetting the bit relative to the least significant bit of the operand. The offset value can be specified either as an immediate value or contained in a general register. You can use the output of the bsr and bsf commands as the offset value. All commands assign the value of the selected bit to the CE flag.

1) bt operand, bit_offset (Bit Test) - bit test. The command transfers the bit value to the cf flag;

2) bts operand, bit_offset (Bit Test and Set) - check and set a bit. The command transfers the value of the bit to the CF flag and then sets the checked bit to 1;

3) btr operand, bit_shift (Bit Test and Reset) - check and reset a bit. The instruction transfers the value of a bit to the CF flag and then sets this bit to 0;

4) btc operand, bit_offset (Bit Test and Convert) - check and invert a bit. The command transfers the value of a bit to the cf flag and then inverts the value of that bit.

Shift commands

The instructions of this group also provide manipulation of individual bits of the operands, but in a different way than the logical instructions discussed above.

All shift instructions move bits in the operand field left or right depending on the opcode. All shift commands have the same structure - cop operand, shift_count.

Number of displaced discharges - offset_counter - is located in the place of the second operand and can be specified in two ways:

1) statically, which involves specifying a fixed value using a direct operand;

2) dynamically, which means storing the shift counter value in the cl register before executing the shift instruction.

Based on the dimension of the cl register, it is clear that the value of the shift counter can be in the range from 0 to 255. But in fact, this is not entirely true. For optimization purposes, the microprocessor only accepts the value least significant five bits counter, i.e. the value ranges from 0 to 31.

All shift commands set the carry flag cf.

As the bits are shifted out of the bounds of the operand, they first hit the carry flag, setting it equal to the value of the next bit outside the bounds of the operand. Where this bit goes next depends on the type of shift command and the algorithm of the program.

By the principle of operation, the shift commands can be divided into two types:

1) linear shift commands;

2) cyclic shift commands.

Linear Shift Commands

Commands of this type include commands that shift according to the following algorithm:

1) the next "extended" bit sets the CF flag;

2) the bit entered into the operand from the other end has the value 0;

3) when the next bit is shifted, it goes into the CF flag, while the value of the previous shifted bit is lost! Linear shift commands are divided into two subtypes:

1) commands of logical linear shift;

2) arithmetic linear shift commands.

The logical linear shift commands include the following:

1) shl operand, shift_counter (Shift Logical Left) - logical left shift. The contents of the operand are left-shifted by the number of bits specified by offset_count. On the right (in the position of the least significant bit) zeros are written;

2) shr operand, shift_counter (Shift Logical Right) - logical shift to the right. The contents of the operand are right-shifted by the number of bits specified by the shift_count value. On the left (in the position of the most significant, sign bit) zeros are written.

Figure 30 shows how these commands work.

Rice. 30. Scheme of operation of commands of linear logical shift

Arithmetic linear shift instructions differ from logical shift instructions in that they work with the sign bit of the operand in a special way.

1) sal operand, shift_count (Shift Arithmetic Left) - arithmetic shift to the left. The contents of the operand are left-shifted by the number of bits specified by offset_count. Zeros are written to the right (in the position of the least significant bit). The sal command does not preserve the sign, but sets flag with / in case of sign change the next pop-out bit. Otherwise, the sal command is completely similar to the shl command;

2) sar operand, shift_counter (Shift Arithmetic Right) - arithmetic shift to the right. The contents of the operand are shifted to the right by the number of bits determined by the value offset_counter. On the left, zeros are written into the operand. The sar command preserves the sign, restoring it after shifting each successive bit.

Figure 31 shows how linear arithmetic shift instructions work.

Rice. 31. Scheme of operation of commands of linear arithmetic shift

Cyclic shift commands

Cyclic shift instructions are instructions that store the values of the bits being shifted. There are two types of cyclic shift commands:

1) simple cyclic shift commands;

2) cyclic shift commands through the carry flag cf.

To teams simple cyclical shift include:

1) rol operand, rotation_counter (Rotate Left) - cyclic shift to the left. The contents of the operand are shifted left by the number of bits specified by the operand offset_counter. Left-shifted bits are written to the same operand on the right;

2) gog operand, shift_counter (Rotate Right) - cyclic shift to the right. The contents of the operand are shifted to the right by the number of bits specified by the operand offset_counter. Right-shifted bits are written to the same operand on the left.

Rice. 32. Scheme of operation of commands of simple cyclic shift

As can be seen from Figure 32, simple cyclic shift commands in the course of their operation perform one useful action, namely: the cyclically shifted bit is not only pushed into the operand from the other end, but at the same time its value becomes the value of the CE flag

Cyclic shift commands via the carry flag CF differ from simple cyclic shift commands in that the shifted bit does not immediately enter the operand from its other end, but is written first into the CE carry flag Only the next execution of this shift command (provided that it is executed in a cycle) leads to the placement of the previously advanced bit from the other end of the operand(fig. 33).

To Cyclic Shift Commands via carry flag the following are related:

1) rcl operand, Rotate through Carry Left - cyclic left shift through carry.

The contents of the operand are shifted left by the number of bits specified by the operand offset_counter. The bits to be shifted alternately become the value of the carry flag cf.

2) rsg operand, Rotate through Carry Right - cyclic right shift through carry.

The contents of the operand are shifted to the right by the number of bits specified by the operand offset_counter. The bits to be shifted alternately become the value of the carry flag CF.

Rice. 33. Commands of cyclic shift through the CF carry flag

Figure 33 shows that when shifting through the carry flag, an intermediate element appears, with the help of which, in particular, it is possible to replace cyclically shifted bits, in particular, mismatch bit sequences.

Here and hereinafter, a mismatch of a bit sequence means an action that allows in some way to localize and extract the necessary parts of this sequence and write them to another place.

Additional shift commands

The instruction set of the latest models of Intel microprocessors, starting with the i80386, contains additional shift instructions that expand the capabilities we discussed earlier. These are the shift commands double precision: 1) shld operand_1, operand_2, shift_count - double precision left shift. The shld command performs replacement by shifting the bits of operand_1 to the left, filling its bits from the right with the values of the bits displaced from operand_2 according to the diagram in Fig. 34. The number of bits shifted is determined by the value offset_counter, operand_2 does not change.

Rice. 34. Scheme of the shld command

2) shrd operand_1, operand_2, shift_count - double precision right shift. The command replaces by shifting the bits of operand_1 to the right, filling its bits from the left with the values of the bits displaced from operand_2 according to the diagram in Figure 35. The number of shifted bits is determined by the value offset_counter, which can be in the range 0 ... 31. This value can be specified by a direct operand or contained in the cl register. Meaning operand_2 does not change.

Rice. 35. Scheme of the shrd command

As we noted, the shld and shrd commands perform shifts up to 32 bits, but due to the specifics of specifying the operands and the operation algorithm, these commands can be used to work with fields up to 64 bits long.

2. Command transfer control

We met some of the teams that make up linear sections of the program. Each of them generally performs some actions to convert or transfer data, after which the microprocessor transfers control to the next command. But very few programs work in this consistent way. There are usually points in a program where you need to decide which command will run next. This solution could be:

1) unconditional - at this point, it is necessary to transfer control not to the command that goes next, but to another that is at some distance from the current command;

2) conditional - the decision about which command will be executed next is made based on the analysis of some conditions or data.

A program is a sequence of commands and data that take up a certain amount of RAM space. This memory space can be either contiguous or multiple chunks.

The microprocessor recognizes which program command should be executed next by the contents of a pair of registers cs: (e) ip:

1) cs - segment code register, which contains the physical (base) address of the current code segment;

2) eip / ip - the instruction pointer register, which contains the value that is the offset in the memory of the next instruction to be executed, relative to the beginning of the current code segment.

Which particular register will be used depends on the set addressing mode use16 or use32. If use 16 is specified, then ip is used, if use32, then eip is used.

Thus, the control transfer commands change the contents of the cs and eip / ip registers, as a result of which the microprocessor selects for execution not the next program command in order, but a command in some other program section. The conveyor inside the microprocessor is then reset.

According to the principle of operation, the microprocessor commands that ensure the organization of transitions in the program can be divided into 3 groups:

1. Commands of unconditional transfer of control:

1) command without conditional jump;

2) the command to call the procedure and return from the procedure;

3) a command to call software interrupts and return from software interrupts.

2. Commands for conditional transfer of control:

1) jump commands by the result of the comparison command p;

2) command of transition according to the state of a certain flag;

3) commands to jump by the contents of the register ecx / cx.

3. Commands to control the cycle:

1) a command for organizing a cycle with an ecx / cx counter;

2) a command for organizing a cycle with an ecx / cx counter with the possibility of an early exit from the cycle by an additional condition.

Unconditional Jumps

The previous discussion revealed some details of the transition mechanism. Jump instructions modify the eip / ip instruction pointer register and possibly the cs code segment register. What exactly needs to be modified depends on:

1) on the type of the operand in the unconditional jump command (near or far);

2) from the indication before the branch address (in the branch command) modifier; in this case, the jump address itself can be located either directly in the command (direct jump), or in a register or memory cell (indirect jump).

Modifier can take the following values:

1) near ptr - direct jump to a label within the current code segment. Only the eip / ip register is modified (depending on the specified type of use16 or use32 code segment) based on the address (label) specified in the command or an expression using the value extraction symbol - $;

2) far ptr - direct jump to a label in another code segment. The jump address is specified as an immediate operand or an address (label) and consists of a 16-bit selector and a 16/32-bit offset, which are loaded, respectively, into the cs and ip / eip registers;

3) word ptr - an indirect jump to a label within the current code segment. Only eip / ip is modified (by the offset value from memory at the address specified in the command, or from the register). Offset size 16 or 32 bits;

4) dword ptr - an indirect jump to a label in another code segment. Both registers - cs and eip / ip are modified (with a value from memory - and only from memory, from a register). The first word / double word of this address represents the offset and is loaded into ip / eip; the second / third word is loaded into cs. Jmp unconditional jump command

The syntax for the unconditional jump command is jmp [modifier] jump_address - unconditional jump without saving information about the return point.

Jump_address is either a label-like address or the address of the memory area in which the jump pointer is located.

In total, the microprocessor instruction set contains several unconditional jmp machine instruction codes.

Their differences are determined by the hop distance and the method of setting the target address. Range transition is determined by the location of the operand jump_address. This address can be in the current code segment or in some other segment. In the first case, the transition is called intra-segment, or loved ones in the second - intersegment, or distant. An intra-segment jump assumes that only the contents of the eip / ip register are changed.

There are three options for the intra-segment use of the jmp command:

1) straight short;

2) straight;

3) indirect.

Procedures

There are several facilities in assembly language, solving the problem duplication of sections of the program code. These include:

1) the mechanism of procedures;

2) a macro assembler;

3) interrupt mechanism.

A procedure often referred to as subroutine, - it is the main functional unit of decomposition (division into several parts) of a task. A procedure is a group of commands for solving a specific subtask and has the means of obtaining control from the point of calling the task more high level and return control to this point.

In the simplest case, a program can consist of one procedure. In other words, a procedure can be defined as a correctly formed set of commands, which, once described, can be called anywhere in the program if necessary.

To describe a sequence of commands as a procedure in assembly language, two directives are used: PROC and ENDP.

The syntax for describing the procedure is as follows (Fig. 36).

Rice. 36. Syntax for describing a procedure in a program

Figure 36 shows that in the header of the procedure (PROC directive), it is only necessary to specify the name of the procedure. Among the large number of PROC directive operands, [distance] should be highlighted. This attribute can take the values near or far and characterizes the ability to refer to the procedure from another code segment. By default, the [distance] attribute is set to near.

The procedure can be placed anywhere in the program, but in such a way that it does not accidentally get control. If the procedure is simply inserted into the general flow of commands, the microprocessor will perceive the commands of the procedure as part of this flow and, accordingly, will execute the commands of the procedure.

Conditional branching

The microprocessor has 18 conditional jump instructions. These commands allow you to check:

1) the relationship between signed operands ("more - less");

2) the relationship between unsigned operands ("above - below");

3) states of arithmetic flags ZF, SF, CF, OF, PF (but not AF).

Conditional jump commands have the same syntax:

jcc jump_label

As you can see, the mnemonic code of all commands begins with "j" - from the word jump(bounce), her - defines a specific condition to be analyzed by the command.

As for the operand jump_label, then this label can only be within the current code segment, intersegment transfer of control in conditional jumps is not allowed. In this regard, the question of the modifier, which was present in the syntax of unconditional jump commands, disappears. In early microprocessor models (i8086, i80186, and i80286), conditional jump instructions could only perform short jumps — a distance of -128 to +127 bytes from the command following the conditional jump command. Starting with the 80386 microprocessor model, this limitation is removed, but, as you can see, only within the current code segment.

In order to make a decision about where the control of the conditional jump command will be transferred, a condition must first be formed, on the basis of which the decision to transfer control will be made.

The sources of such a condition can be:

1) any command that changes the state of arithmetic flags;

2) the comparison command p, comparing the values of two operands;

3) the state of the ecx / cx register.

Comparison command cmp

The pg comparison command has an interesting working principle. It is exactly the same as the subtract command - sub operand, operand_2.

The p command, like the sub command, subtracts operands and sets flags. The only thing it doesn't do is write the result of the subtraction in place of the first operand.

Command syntax str - str operand_1, operand_2 (compare) - compares two operands and sets flags based on the results of the comparison.

The flags set by the p command can be parsed with special conditional branch commands. Before we look at them, let's pay a little attention to the mnemonics of these conditional jump instructions (Table 16). Understanding the designations in the formation of the name of the conditional jump commands (the element in the name of the jcc command, we designated it) will facilitate their memorization and further practical use.

Table 16. Meaning of abbreviations in the name of the jcc command

Table 17. List of conditional jump instructions for command str operand_1, operand_2

Do not be surprised that the same flag values correspond to several different mnemonic codes of the conditional branch commands (they are separated from each other by a slash in Table 17). The difference in name is due to the desire of the microprocessor designers to facilitate the use of conditional branch instructions in conjunction with certain groups of instructions. Therefore, different names reflect rather different functional orientations. Nevertheless, the fact that these commands respond to the same flags makes them absolutely equivalent and equal in the program. Therefore, in Table 17, they are grouped not by name, but by the values of the flags (conditions) to which they react.

Conditional jump commands and flags

The mnemonic designation of some conditional jump commands reflects the name of the flag with which they work, and has the following structure: the first is the character "j" (Jump, transition), the second - either the flag designation, or the negation symbol "n", followed by the name of the flag. This team structure reflects its purpose. If there is no “n” symbol, then the state of the flag is checked, if it is equal to 1, the transition to the transition label is made. If the symbol "n" is present, then the state of the flag is checked for equality 0, and if successful, the transition to the transition label is made.

Command mnemonic codes, flag names and transition conditions are shown in Table 18. These commands can be used after any commands that change the specified flags.

Table 18. Conditional branch commands and flags

If you look closely at tables 17 and 18, you can see that many of the conditional branch commands in them are equivalent, since both are based on the analysis of the same flags.

Conditional jump instructions and register ecx / cx

The microprocessor architecture assumes the specific use of many registers. For example, the EAX / AX / AL register is used as an accumulator, and the BP, SP registers are used to work with the stack. The ECX / CX register also has a certain functional purpose: it performs the role counter in loop control commands and when working with character strings. It is possible that functionally the command of the conditional branch associated with the register exx / cx would be more correctly attributed to this group of commands.

The syntax for this conditional jump command is as follows:

1) jcxz jump_label (Jump if ex is Zero) - jump if cx is zero;

2) jecxz junction_label (Jump Equal exx Zero) - jump if exx is zero.

These commands are very useful for looping and character strings.

A limitation inherent in the jcxz / jecxz command should be noted. Unlike other conditional control transfer commands, the jcxz / jecxz command can only address short jumps —128 bytes or +127 bytes from the next command.

Cycle organization

A loop, as you know, is an important algorithmic structure, without the use of which, probably, no program can do. Cyclic execution of a certain section of the program can be organized, for example, using the command of the conditional transfer of control or the command of the unconditional jump jmp. With this organization of the cycle, all operations for organizing it are performed manually. But, given the importance of such an algorithmic element as a cycle, the developers of the microprocessor introduced a group of three commands into the instruction system to facilitate programming of cycles. These commands also use the ecx / cx register as cycle counter.

Let's give brief description these commands: 1) loop loop_label (Loop) - repeat the loop. The command allows you to organize loops similar to for loops in high-level languages with automatic decrementing of the loop counter. The team's job is to do the following:

b) comparing the ECX / CX register with zero: if (ECX / CX) = 0, then control is transferred to the next command after the loop;

2) loope / loopz hop_label

The loope and loopz commands are absolute synonyms. The work of the teams is to perform the following actions:

a) decrement of the ECX / CX register;

c) analysis of the state of the ZF zero flag if (ECX / CX) = 0 or XF = 0, control is transferred to the next command after the loop.

3) loopne / loopnz hop_label

The loopne and loopnz commands are also absolute synonyms. The work of the teams is to perform the following actions:

a) decrement of the ECX / CX register;

b) comparing the ECX / CX register with zero;

c) analysis of the state of the ZF zero flag: if (ECX / CX) = 0 or ZF = 1, control is transferred to the next command after the loop.

The loope / loopz and loopne / loopnz commands are reciprocal in their work. They extend the action of the loop command by further analyzing the zf flag, which makes it possible to organize an early exit from the loop, using this flag as an indicator.

The disadvantage of the loop, loope / loopz, and loopne / loopnz commands is that they only implement short hops (-128 to +127 bytes). To work with long cycles you will have to use the conditional jump commands and the jmp command, so try to master both methods of looping.

Arithmetic instructions treat operand codes as numeric binary or binary-decimal codes. These commands can be divided into five main groups:

Fixed point operations commands (addition, subtraction, multiplication, division);

Floating point commands (addition, subtraction, multiplication, division);

Cleaning commands;

Increment and decrement commands;

Comparison command.

Fixed-point instructions operate on codes in processor registers or memory as normal binary codes. The addition (ADD) command calculates the sum of two codes. The subtract (SUB) command calculates the difference between two codes. The multiply instruction (MUL) calculates the product of two codes (the word length of the result is twice the word length of the factors). The division command (DIV) calculates the quotient of dividing one code by another. Moreover, all these commands can work with both signed and unsigned numbers.

Floating point (point) instructions use the format of representing numbers with order and mantissa (usually these numbers occupy two consecutive memory locations). In modern powerful processors, the floating point instruction set is not limited to just four arithmetic operations, but contains many other more complex instructions, for example, the calculation of trigonometric functions, logarithmic functions, as well as complex functions necessary for processing sound and images.

Clear instructions (CLR) are designed to write zero code to a register or memory location. These commands can be replaced with zero transfer commands, but special clear commands are usually faster than transfer commands. Cleanup commands are sometimes referred to as logical commands, but their essence remains the same.

The increment (increase by one, INC) and decrement (decrease by one, DEC) commands are also very handy. They can in principle be replaced by the addition with one or subtract one commands, but increment and decrement are faster than addition and subtraction. These instructions require one input operand, which is also an output operand.

Finally, the compare instruction (denoted by CMP) compares two input operands. In fact, it calculates the difference between these two operands, but does not form an output operand, but only changes the bits in the processor status register (PSW) based on the result of this subtraction. The next instruction after the compare instruction (usually a branch instruction) will analyze the bits in the processor status register and perform actions depending on their values. Some processors provide instructions for daisy chaining two sequences of operands in memory (for example, the 8086 and compatible).

Logic commands

Logical instructions perform logical (bitwise) operations on operands, that is, they consider the operand codes not as a single number, but as a set of separate bits. This is how they differ from arithmetic commands. Logic commands perform the following basic operations:

Logical AND, logical OR, addition modulo 2 (Exclusive OR);

Logical, arithmetic and cyclic shifts;

Checking bits and operands;

Setting and clearing bits (flags) of the processor status register (PSW).

Logic instructions allow you to compute basic logic functions from two input operands bit by bit. In addition, the AND operation is used to forcibly clear the specified bits (a mask code is used as one of the operands, in which the bits to be cleared are set to zero). The OR operation (OR) is used to forcibly set the specified bits (as one of the operands, the mask code is used, in which the bits that require setting to one are equal to one). The XOR operation is used to invert the specified bits (a mask code is used as one of the operands, in which the bits to be inverted are set to one). The instructions require two input operands and form one output operand.

Shift commands allow you to bitwise shift the operand code to the right (towards the lower-order bits) or to the left (towards the higher-order bits). The type of shift (logical, arithmetic, or cyclic) determines what the new value of the most significant bit (when shifting to the right) or least significant bit (when shifting to the left) will be, and also determines whether the previous value of the most significant bit (when shifting to the left) will be saved somewhere or the least significant bit (when shifted to the right). For example, with a logical shift to the right, the most significant bit of the operand code is set to zero, and the least significant bit is written as a carry flag to the processor status register. And with an arithmetic shift to the right, the value of the most significant bit remains the same (zero or one), the least significant bit is also recorded as a carry flag.

Cyclic shifts allow the bits of an operand to be shifted in a circular fashion (clockwise when shifted to the right, or counterclockwise when shifted to the left). In this case, the carry flag may or may not be included in the shift ring. The carry flag bit (if used) stores the value of the most significant bit when cycled to the left and the least significant bit when cycled to the right. Accordingly, the value of the carry flag bit will be overwritten in the least significant bit when cycling to the left and in the most significant bit when cycling to the right.

For example, in Fig. 2.3 shows the actions performed by the commands of shift to the right.

Bits and operand check commands are designed to set or clear bits of the processor status register, depending on the value of the selected bits or the entire operand as a whole. The command does not generate an output operand. The Operand Check (TST) instruction checks the entire operand code for equality to zero and for sign (the value of the most significant bit), it requires only one input operand. The Bit Check Instruction (BIT) only checks individual bits that are selected using a mask code as the second operand. In the mask code, the checked bits of the main operand must correspond to ones.

Rice. 2.3.Right Shift Commands.

Finally, the commands to set and clear the processor status register bits (that is, flags) allow you to set or clear any flag, which is very convenient. Each flag is usually associated with two commands, one of which sets it to one, and the other resets it to zero. For example, carry flag C (from Carry) would correspond to CLC (clear) and SEC or STC (set).

Jump commands

Jump instructions are designed to organize all kinds of loops, branches, subroutine calls, etc., that is, they disrupt the sequential flow of the program. These commands write a new value to the command counter register and thus cause the processor to jump not to the next command in order, but to any other command in the program memory. Some transition commands provide further return back to the point from which the transition was made, others do not provide for this. If return is provided, then the current processor parameters are saved on the stack. If no return is provided, then the current processor parameters are not saved.

Transition commands without backtracking are divided into two groups:

Unconditional branch commands;

Conditional branch commands.

These commands use the words Branch and Jump.

Unconditional jump instructions cause a jump to a new address regardless of anything. They can cause a jump by a specified amount of offset (forward or backward) or to a specified memory address. The offset value or the new address value is specified as an input operand.

Conditional jump instructions do not always cause a jump, but only when the specified conditions are met. These conditions are usually the values of the flags in the Processor Status Register (PSW). That is, the transition condition is the result of the previous operation that changes the values of the flags. There can be from 4 to 16 such jump conditions in total. Several examples of conditional jump commands:

Jump if equal to zero;

Jump if not zero;

Jump if there is overflow;

Jump if there is no overflow;

Jump if greater than zero;

Jump if less than or equal to zero.

If the transition condition is met, the new value is loaded into the command register. If the jump condition is not met, the instruction counter is simply incremented, and the processor selects and executes the next instruction in order.

The comparison (CMP) instruction that precedes the conditional branch instruction (or even several conditional branch instructions) is used specifically to check the jump conditions. But flags can be set by any other command, for example, a data transfer command, any arithmetic or logical command. Note that the jump commands themselves do not change the flags, which just allows you to put several jump commands one after another.

The combined use of several commands of conditional and unconditional jumps allows the processor to execute branched algorithms of any complexity. For example, in Fig. 2.4 shows the branching of the program into two branches with the subsequent connection, and in fig. 2.5 - Forking into three branches followed by a connection.

Jump commands with a further return to the point from which the jump was made are used to execute subroutines, that is, auxiliary programs. These commands are also called subroutine call commands (common name is CALL). The use of subroutines allows to simplify the structure of the main program, make it more logical, flexible, easy to write and debug. At the same time, it should be borne in mind that the widespread use of subroutines, as a rule, increases the program execution time.

Rice. 2.4.Forking into two branches.

Rice. 2.5.Implementing branching into three branches.

All backtrack commands assume unconditional branching (they do not check any flags). Moreover, they require one input operand, which can indicate both the absolute value of the new address and the offset added to the current value of the address. The current value of the program counter (current address) is saved before the jump is performed on the stack.

To return back to the subroutine call point (jump point), use a special return command (RET or RTS). This instruction pops the value of the jump instruction address from the stack and writes it to the instruction counter register.

Interrupt commands (commonly referred to as INT) occupy a special place among jump and return commands. These instructions require an interrupt number (vector address) as an input operand. Servicing such transitions is done in the same way as hardware interrupts. That is, to perform this transition, the processor refers to the interrupt vector table and receives from it, by the interrupt number, the memory address to which it needs to go. The interrupt call address and the contents of the processor status register (PSW) are stored on the stack. Saving PSW is an important difference between interrupt instructions and return branch instructions.

Interrupt commands are in many cases more convenient than the usual backtracking commands. You can create a table of interrupt vectors once, and then refer to it as needed. The interrupt number corresponds to the subroutine number, that is, the number of the function performed by the subroutine. Therefore, interrupt instructions are much more likely to be included in processor instruction sets than conventional return-branch instructions.

To return from a subroutine called by an interrupt instruction, use an interrupt return instruction (IRET or RTI). This command pops the program counter and processor status register (PSW) stored there from the stack.

Note that some processors also provide conditional interrupt instructions, such as the overflow interrupt instruction.

Of course, in this section, we have considered only the basic commands that are most commonly found in processors. Specific processors may have many other instructions that do not belong to the listed instruction groups. But they must be studied after the type of processor has been selected that is suitable for the task solved by the given microprocessor system.

Arithmetic instructions treat operand codes as numeric binary or binary-decimal codes. These commands can be divided into five main groups:

Fixed point operations commands (addition, subtraction, multiplication, division);

Floating point commands (addition, subtraction, multiplication, division);

Cleaning commands;

Increment and decrement commands;

Comparison command.

Fixed Point Commands work with codes in processor registers or in memory as with ordinary binary codes. The addition (ADD) instruction calculates the sum of two codes. The subtract (SUB) command calculates the difference between two codes. The multiply instruction (MUL) calculates the product of two codes (the bit width of the result is twice the bit width of the factors). The division command (DIV) calculates the quotient of dividing one code by another. Moreover, all these commands can work with both signed and unsigned numbers.

Floating point commands(dot) use the format of representing numbers with order and mantissa (usually these numbers occupy two consecutive memory locations). In modern powerful processors, the floating point instruction set is not limited to just four arithmetic operations, but contains many other more complex instructions, for example, the calculation of trigonometric functions, logarithmic functions, as well as complex functions necessary for processing sound and images.

Cleanup commands(CLR) are designed to write zero code to a register or memory location. These commands can be replaced with zero transfer commands, but special clear commands are usually faster than transfer commands. Cleanup commands are sometimes referred to as logical commands, but their essence remains the same.

Increment commands(increments by one, INC) and decrement(decrements by one, DEC) are also very convenient. They can in principle be replaced by the addition with one or subtract one commands, but increment and decrement are faster than addition and subtraction. These instructions require one input operand, which is also an output operand.

Finally, compare command(denoted CMP) is for comparing two input operands. In fact, it calculates the difference between these two operands, but does not form an output operand, but only changes the bits in the processor status register (PSW) based on the result of this subtraction. The next instruction after the compare instruction (usually a branch instruction) will analyze the bits in the processor status register and perform actions depending on their values. Some processors provide instructions for daisy chaining two sequences of operands in memory (for example, the 8086 and compatible).

Logic commands

Logical AND, logical OR, addition modulo 2 (exclusive OR);

Logical, arithmetic and cyclic shifts;

Checking bits and operands;

Setting and clearing bits (flags) of the processor status register (PSW).

Boolean commands allow to calculate the basic logic functions from two input operands bit by bit. In addition, the AND operation is used to forcibly clear the specified bits (a mask code is used as one of the operands, in which the bits to be cleared are set to zero). The OR operation (OR) is used to forcibly set the specified bits (as one of the operands, a mask code is used, in which the bits that require setting to one are equal to one). The XOR operation is used to invert the specified bits (a mask code is used as one of the operands, in which the bits to be inverted are set to one). The instructions require two input operands and form one output operand.

Shift commands allow to shift the operand code bit by bit to the right (towards the low order bits) or to the left (towards the high order bits). The type of shift (logical, arithmetic, or cyclic) determines what the new value of the most significant bit (when shifted to the right) or least significant bit (when shifted to the left) will be, and also determines whether the previous value of the most significant bit (when shifted to the left) will be saved somewhere or junior pit (when shifted to the right). For example, with a logical shift to the right, zero is set in the most significant bit of the operand code, and the least significant bit is written as a carry flag into the processor status register. And with an arithmetic shift to the right, the value of the most significant bit remains the same (zero or one), the least significant bit also fits in as a carry flag.

Cyclic shifts allows you to shift the bits of the operand code in a circle (clockwise when shifted to the right or counterclockwise when shifted to the left). In this case, the carry flag may or may not be included in the shift ring. The carry flag bit (if used) stores the value of the most significant bit when cycled to the left and the least significant bit when cycled to the right. Accordingly, the value of the carry flag bit will be overwritten in the least significant bit when cyclic shifting to the left and in the most significant bit when shifting to the right.

For example, in Fig. 1 shows the actions performed by the shift right commands.

Bits and Operand Check Commands are intended for setting or clearing bits of the processor status register, depending on the value of the selected bits or the entire operand as a whole. The command does not generate an output operand. The Operand Check (TST) instruction checks the entire operand code for equality to zero and for sign (the value of the most significant bit), it requires only one input operand. The Bit Check Instruction (BIT) only checks individual bits that are selected using a mask code as the second operand. In the mask code, the checked bits of the main operand must correspond to ones.

Finally, commands to set and clear bits of the processor status register(i.e. flags) allow you to set or clear any flag, which is very convenient. Each flag usually corresponds to two commands, one of which sets it to one, and the other resets it to zero. For example, carry flag C (from Carry) would correspond to CLC (clear) and SEC or STC (set).

Rice. 1. Commands to shift to the right

Jump commands

Transition commands without backtracking are divided into two groups:

Unconditional branch commands;

Conditional branch commands.

These commands use the words Branch and Jump.

Unconditional Jump Commands cause a jump to a new address regardless of anything. They can cause a jump by a specified amount of offset (forward or backward) or to a specified memory address. The offset value or the new address value is specified as an input operand.

Conditional jump commands they do not always cause a transition, but only when the specified conditions are met. These conditions are usually the values of the flags in the Processor Status Register (PSW). That is, the transition condition is the result of the previous operation that changes the values of the flags. There can be from 4 to 16 such jump conditions in total. Several examples of conditional jump commands:

Jump if equal to zero;

Jump if not zero;

Jump if there is overflow;

Jump if there is no overflow;

Jump if greater than zero;

Jump if less than or equal to zero.

The comparison command (CMP) preceding the conditional branch command (or even several conditional branch commands) is used specifically to check the jump conditions. But flags can be set by any other command, for example, a data transfer command, any arithmetic or logical command. Note that the jump commands themselves do not change the flags, which just allows you to put several jump commands one after another.

The combined use of several commands of conditional and unconditional jumps allows the processor to execute branched algorithms of any complexity. For example, in Fig. 2 shows the branching of the program into two branches with the subsequent connection, and in fig. 3 - branching into three branches with subsequent connection.

Backtrack jump commands to the point from which the jump was made, are used to execute subroutines, that is, auxiliary programs. These commands are also called subroutine call commands (common name is CALL). The use of subroutines allows to simplify the structure of the main program, make it more logical, flexible, easy to write and debug. At the same time, it should be borne in mind that the widespread use of subroutines, as a rule, increases the program execution time.

Rice. 2. Implementation of branching into two branches. Rice. 3. Implementation of branching into three branches.

Note that some processors also provide conditional interrupt instructions, such as the overflow interrupt instruction.

By indirect address

PCHL - the jump address is stored in the HL register pair. When it is executed (HL) → PC.

Conditional jump commands

Jcon @, where con is the condition mnemonic from the English word condition.

Earlier it was noted that the state of the bits (flags) РгП (F) is used as a transition condition. The mnemonic corresponding to these states is shown in Fig. 6.18.

For example: JC 8BFE - when C = 1, jump to address 8BFE, when C = 0, the next command at the address is executed.

PP call and return commands

It was previously noted that the return address is automatically stored on the stack, i.e. (PC) ® stack.

Unconditional commands

CALL @ - subroutine call;

RET - return from a subroutine.

Conditional commands

Ccon @ - subroutine call;

Rcon - return from a subroutine.

The actions of the commands are similar to the actions of the conditional branch commands, i.e. if the condition is true, then call or return. If not, then the following commands are executed.

Other control commands

RST n, where n = 0,1, ..., 7 - restart by interrupt vector n.

When this command is executed, control is transferred to the subroutine serving this interrupt. During the execution of the RST instruction, the contents of the PC instruction counter are stored in the stack, and the address of the corresponding interrupt vector is written to the PC.

This address is set as follows. The RST command has the structure 11NN N111, i.e. one byte. The three-digit combination NNN is specified by the value n (n = 0 ... 7). The value 0000 0000 00NN N000 is entered into the PC command counter, which serves as the address of the corresponding interrupt vector.

Thus, by setting a certain value of n, it is possible to form the address of one of the 8 interrupt vectors. These addresses are located in the zone from 0000H to 0038H of the address space and go through 8 bytes, i.e. the first 64 memory cells are reserved for them (each of the 8 vectors is allocated 8 bytes). In these zones (8 bytes each), only the commands for the transition to the corresponding subroutines (handlers), which are located in other memory areas, are written.

Interrupting subroutines (like regular subroutines) must end with a RET instruction. In the process of executing this command, the address of the command of the main program, before which the interrupt occurred, is taken from the stack and transferred to the register of the address PA, and the value increased by 1 is entered into the command counter.

EI - enable interrupt. This command is placed at the beginning of the program section where interruption is allowed. On this command, the trigger for enabling the interrupt in the UU MP is set to state 1.

DI - disable interrupt. This command is placed at the end of the program section where the interrupt was allowed and resets the trigger to 0.

NOP is an "empty" command. Skips 4 bars. Only the PC changes.

HLT - stop. Causes the termination of the program execution and transition to the stop state. The MP is disconnected from the external address and data buses (i.e., their buffers go into the Z state). The level 1 is set at the WAIT output (waiting). This state can be interrupted by the start signals of the MP or by transferring it to the interrupt state.

QUESTIONS FOR SELF-TEST

1. What devices are needed to create the simplest micro-computer?

2. List 5 variants of micro-computer structures.

3. Using an intermediate interface.

4. What does the concept of "CP controller" include?

5. List the characteristics of the I8080 processor.

6. Data registers. Their purpose.

7. Feature registers. What characteristics are stored in these registers?

8. Describe the principle of bidirectional data exchange between internal and external stepper motors.

9. What registers can a programmer use?

10. Give a block diagram of a micro-computer based on MP KR580VM80.

11. What steps does a machine cycle consist of?

12. List the data formats of MP KR580VM80.

13. List the formats of commands MP KR580VM80.

14. What addressing methods are used in the MP KR580VM80?

15. What groups can be divided into the teams of MP KR580VM80?

16. Single-byte transfers. Give examples of commands from this group.

17. Double-byte transfers. Give examples of commands from this group.

18. What operations in the accumulator do you know.

19. Operations in RON and memory. What operations are related to them?

20. List the control commands.

CONTROL TASKS

1. The answer sheets must indicate the number of the group, the name of the student and the number of his variant.

2. The numbers of the questions are chosen by the student in accordance with his last two digits in the record book. In Table 6.1, n-1 is the penultimate digit of the number, and n is the last digit. In the cells of the table there are numbers of questions to which a written answer must be given.

Question numbers Table 6.1

a n a n-1
	1,5,9, 13,16	2,6,10,14,17	3,7,11,15,18	4,8,12,13,19	1,9,11,14,20	2,10,12,15,18	3,5,8, 13,17	4,6,7, 14,19	1,8,10,13,17	2,5,7, 14,18
	3,6,8, 15,19	4,7,9, 13,16	1,5,12,14,20	2,6,11,15,16	3,7,10,13,17	4,8,9, 14,18	1,7,12,13,18	2,8,10,14,19	3,5,11,15,20	4,6,9, 13,17
	2,7,9, 13,20	1,8,11,15,19	4,5,10,15,17	3,6,12,14,16	1,5,9, 13,16	2,6,10,14,17	3,7,11,15,18	4,8,12,13,19	1,9,11,14,20	2,10,12,15,18
	3,5,8, 13,17	4,6,7, 14,19	1,8,10,13,17	2,5,7, 14,18	3,6,8, 15,19	4,7,9, 13,16	1,5,12,14,20	2,6,11,15,16	3,7,10,13,17	4,8,9, 14,18
	1,7,12,13,18	2,8,10,14,19	3,5,11,15,20	4,6,9, 13,17	2,7,9, 13,20	1,8,11,15,19	4,5,10,15,17	3,6,12,14,16	1,5,9, 13,16	2,6,10,14,17
	3,7,11,15,18	4,8,12,13,19	1,9,11,14,20	2,10,12,15,18	3,5,8, 13,17	4,6,7, 14,19	1,8,10,13,17	2,5,7, 14,18	3,6,8, 15,19	4,7,9, 13,16
	1,5,12,14,20	2,6,11,15,16	3,7,10,13,17	4,8,9, 14,18	1,7,12,13,18	2,8,10,14,19	3,5,11,15,20	4,6,9, 13,17	2,7,9, 13,20	1,8,11,15,19
	4,5,10,15,17	3,6,12,14,16	1,5,9, 13,16	2,6,10,14,17	3,7,11,15,18	4,8,12,13,19	1,9,11,14,20	2,10,12,15,18	3,5,8, 13,17	4,6,7, 14,19
	1,8,10,13,17	2,5,7, 14,18	3,6,8, 15,19	4,7,9, 13,16	1,5,12,14,20	2,6,11,15,16	3,7,10,13,17	4,8,9, 14,18	1,7,12,13,18	2,8,10,14,19
	3,5,11,15,20	4,6,9, 13,17	2,7,9, 13,20	1,8,11,15,19	4,5,10,15,17	3,6,12,14,16	1,5,9, 13,16	2,6,10,14,17	3,7,11,15,18	4,8,12,13,19

To organize branching, jump commands are used that allow you to change the sequence of execution of program commands by performing unconditional or conditional jumps.

When executing commands unconditional jump the current sequence of commands is violated and a transition to the execution of another sequence of commands specified in the command occurs. For this transition, it is necessary to change the address of the request for the next command in the command counter.

X byte

JMP ADDR - unconditional jump. Control is transferred to the command whose address is specified in the second and third bytes of the jump command. (PC) ß [(BYTE3) (BYTE2)].

When executing commands conditional jump further selection of one of the sequence of commands depends on one of the four flags: zero (Z), sign of the result (S), parity (P), carry (C), i.e. first, the state of one of the four flags of the MP is checked for execution of the specified in the command conditions, and then the command is executed. If the condition is fulfilled, the transition to the new address is carried out, otherwise the next command is executed. For the convenience of programming, conditions are checked for single and zero values of the flags CY (C), Z, S, P. The mnemonic of the conditional jump commands is formed by adding the letter J (condition) to the name of the condition, and then the address is indicated where to jump if the condition is satisfied ...

All commands are 3 bytes.

The transition conditions are given in table 1

Table 1

Commands for calling subroutines and returning from them, software interrupt

X byte

CALL ADDR - unconditional call of the subroutine at the address loaded into the program counter;

Single byte

RET - return from the subroutine unconditional;

RSTN - call interrupt routine. (N is the number of the interrupting program)

Programming

Assembly language is a machine-oriented programming tool. The assembly language program is called the original.

An assembler translates a source program in symbols into binary machine codes. Such a program is called object, it can be loaded into memory for execution.

The program is developed in the form of a sequence of sentences called operators assembly language. Each operator is written on one separate line, and after translation generates one machine command... The operator line has four fields:

Label field;

Operation code field;

Operand field;

Comment field.

Label field is a conventional name or a set of characters starting with a specific letter. A colon must be placed after the label name. A label is assigned to a command in those cases when it is necessary to return to it during program execution (return by label). The return label name is written in the conditional and unconditional branch command. You cannot write the same label in multiple statements. Only those operators to which there is a reference from other operators of the program are marked with labels.

Code field operations used to mnemonic the opcode of a command. The mnemonic is separated from the operands by at least one space. Most of the mnemonics are abbreviations of the English words that characterize the main functions of the team. The adjacent field to the right is separated by at least one space.

V operand field provides information about the data on which operations are performed. The operands are names of registers and register pairs, labels or direct data. For conditional and unconditional jump commands, this field stores the name of the return label.

Comment field begins with ";". Place a description of the operator's purpose. This field has auxiliary functions and is used only by the programmer when writing a program.

All statements are written using ASCII (American Standard Code for Information Interchange) characters.

During translation, the assembler assigns the value 0800H to its address counter; the first command or data byte will be located at this address in the program.