The previous discussion revealed some details of the transition mechanism. Jump instructions modify the EIP / IP instruction pointer register and possibly the CS code segment register. What exactly needs to be modified depends on:
on the type of the operand in the unconditional jump command (near or far);
from the modifier, which is indicated before the jump address in the jump command and can take the following values (the address itself with a direct jump is directly in the command, and with an indirect one - in a register or memory cell):
NEAR PTR - direct jump to a label within the current code segment, while only the EIP / IP register is modified (depending on the specified use16 or use32 code segment type) based on the address (label) specified in the command or an expression using the address counter value extraction character commands ($);
FAR PTR - direct jump to a label in another code segment, while the transition address is specified as a direct operand or an address (label) and consists of a 16-bit selector and a 16/32-bit offset, which are loaded, respectively, into the CS and EIP / IP;
WORD PTR - an indirect jump to a label within the current code segment, while only the EIP / IP register is modified (by an offset value of 16 or 32 bits from memory at the address specified in the command or from a register);
DWORD PTR - an indirect jump to a label in another segment of the code, while both registers, CS and EIP / IP (the first word / double word of the jump address, which is an offset, loaded in EIP / IP; second / third word in CS).
Unconditional jump command
Unconditional jump command syntax without saving point information
return:
jmp [modifier] jump_address
Here, branch_address represents the label or address of the memory area in which the branch pointer is located.
In total, the processor instruction set contains several unconditional JMP machine instruction codes. Their differences are determined by the hop distance and the method of setting the target address. The hop range is determined by the location of the hop_address operand. This address can be in the current code segment or in some other segment. In the first case, the transition is called intra-segment, or close, in the second - intersegment, or distant.
An intra-segment hop assumes that only the contents of the EIP / IP register are changed. There are three options for the intra-segment use of the JMP command:
Direct short jump;
Direct transition;
Indirect transition.
A direct short intra-segment jump is used when the distance from the JMP command to the jump address is less than -128 or +127 bytes. In this case, the assembler translator generates an unconditional jump machine instruction only two bytes long (the size of a normal intra-segment unconditional jump instruction is three bytes). The first byte in this command is an operation code, the value of which indicates that the processor should treat the second byte of the command in a special way. The value of the second byte is calculated by the translator as the difference between the offset value of the command following the JMP and the value of the branch address. When making a direct short jump, you need to keep in mind the following important point associated with the location of the jump address and the JMP command itself. If the jump address is located before the JMP instruction, then the assembler generates a short unconditional jump instruction without additional instructions. If the branch address is located after the JMP command, the translator cannot determine itself that the branch is short, since it does not yet have information about the branch address. In addition to the previously mentioned modifiers, the SHORT PTR modifier is used to assist the compiler in generating a short unconditional jump instruction:
jmp short ptr ml
...; no more than 35-40 commands (127 bytes)
Another option:
...; no more than 35-40 commands (-128 bytes)
A direct intra-segment jump differs from a direct short intra-segment jump in that the length of the JMP machine instruction in this case is three bytes. The increase in length is due to the fact that the field of the jump address in the JMP machine instruction expands to two bytes, and this, in turn, allows for jumps within 64 KB relative to the command following the JMP:
Distance more than 128 bytes and less than 64 KB
Indirect intra-segment jump implies the "indirection" of setting the jump address. This means that the command specifies not the jump address itself, but the place where it "lies". Here are some examples in which a two-byte jump address is selected either from a register or from a memory area:
jmp bx; jump address in bx register
jmp addr_ml; jump address in memory location addrjnl
A few more options for indirect intra-segment transition:
<3>addr dw ml
<10>jmpaddr; jump address in memory word addr + (si)
<12>mov si.2
<13>jmp cycl
In this example, one JMP command (line 10) can jump to different labels. The choice of a specific jump label is determined by the contents of the SI register. The JMP instruction operand determines the branch address indirectly after evaluating the addr + (SI) expression.
<3>addr dw ml
<7>lea si, addr
<8>jmp near ptr; jump address in memory location addr
In this case, specifying the NEAR PTR modifier is mandatory, since, unlike the previous method, the address of the memory cell addr with the jump address is implicitly transferred to the translator (lines 3, 7, and 8), and, without information about the label, it cannot determine what kind of transition is carried out - intra-segment or intersegment. Intersegment jump assumes a different format of the JM P machine instruction. When performing an intersegment jump, other than the EIP / IP register
the CS register is also modified. Similar to an intra-segment jump, an intersegment jump is supported by two variants of unconditional jump commands:
direct and indirect.
A direct intersegment jump command is five bytes long, of which two bytes are the offset value and two bytes are the segment address value:
jmp far ptr m2; here far is required
jmp ml; here far is optional
As you look at this example, notice the FAR PTR modifier in the JMP command. Its necessity is explained by the same logic of the single-pass translator operation. If the description of the label (label ml) occurs in the source code of the program earlier than the corresponding jump command, then specifying the modifier is optional, since the translator knows everything about this label and itself forms the required five-byte form of the unconditional jump command. In the case when the jump command is encountered before the description of the corresponding label, the translator does not yet have any information about the label, and the FAR PTR modifier in the JMP command cannot be omitted, since the translator does not know what form of the command to form - three-byte or five-byte. Without a special indication of the modifier, the translator will form a three-byte intra-segment jump instruction.
The indirect intersegment jump instruction as an operand has the address of the memory area, which contains the offset and the segment part of the jump target address:
addrjnl dd ml; in the addr_ml field the offset values
; and the addresses of the ml label segment
As a variant of the indirect intersegment transition, it is necessary to note the indirect register intersegment transition. In this type of transition, the transition address is indicated indirectly - in the register. This is very convenient for programming dynamic branches, in which the branch address can change at the stage of program execution:
addr_ml dd ml; in the addr_ml field the offset values
; and the addresses of the ml label segment
jmp dword ptr
Thus, the SHORT PTR, NEAR PTR and WORD PTR modifiers are used to organize intra-segment transitions, while FAR PTR and DWORD PTR are used for intersegment transitions.
For complete clarity, it should be emphasized once again that if the segment type is use32, then in those places where the IP register was discussed, the EIP register can be used and, accordingly, the size of the offset fields can be increased to 32 bits.
The violation of the natural order of instructions, when the address of the next executed instruction is automatically calculated by the program counter, is carried out by loading new addresses into the program counter and, if necessary, into the CS segment register. These actions are performed using conditional and non-conditional commands. conditional jumps.
Unconditional Jumps
An unconditional jump is a jump that always occurs. An unconditional jump is carried out using the command JMP... This instruction has one operand, which can be an immediate address, a register, or a memory location containing an address. Examples of unconditional jumps:
Jmp metka; Jump to a label jmp bx; Jump to an address in BX jmp word; Jump to an address held in memory by an address in BX
Conditional branching
A conditional branch is performed if a certain condition specified by the processor flags is met. The state of the flags changes after the execution of arithmetic, logical and some other commands. If the condition is not met, then control passes to the next command.
There are many commands for various conditional branches. Let's take a closer look at all of these commands:
| Command | Jump if | Jump condition |
|---|---|---|
| JZ / JE | zero or equal | ZF = 1 |
| JNZ / JNE | not zero or not equal | ZF = 0 |
| JC / JNAE / JB | there is overflow / not above and not equal / below | CF = 1 |
| JNC / JAE / JNB | no overflow / above or equal / not below | CF = 0 |
| JP | the number of single bits is even | PF = 1 |
| JNP | the number of single bits is odd | PF = 0 |
| Js | sign equals 1 | SF = 1 |
| JNS | sign is 0 | SF = 0 |
| JO | there is an overflow | OF = 1 |
| JNO | no overflow | OF = 0 |
| JA / JNBE | above / not below and not equal | CF = 0 and ZF = 0 |
| JNA / JBE | not higher / lower or equal | CF = 1 or ZF = 1 |
| JG / JNLE | more / not less and not equal | ZF = 0 and SF = OF |
| JGE / JNL | more or equal / not less | SF = OF |
| JL / JNGE | less / not more and not equal | SF ≠ OF |
| JLE / JNG | less or equal / not more | ZF = 1 or SF ≠ OF |
| JCXZ | CX content is zero | CX = 0 |
All of these commands have one operand - the name of the jump label. Comparisons "above" and "below" refer to unsigned numbers, while comparisons "greater than" and "less" refer to signed numbers.
CMP and TEST commands
To form transition conditions, use the commands CMP and TEST... Command CMP is for comparing numbers. It is executed similarly to the command SUB: the second is subtracted from the first operand, but the result is not written in place of the first operand, only the values of the flags are changed. For example:
Cmp al, 5; Comparison of AL and 5 jl c1; Jump if AL
Command TEST works similarly to the command AND but also the result is not saved, only the flags are changed. With this command, you can check the status of various bits of the operand. For example:
Test bl, 00000100b; Check the state of the 2nd bit BL jz c2; Jump if the 2nd bit is 0
To organize branching, jump commands are used that allow you to change the sequence of execution of program commands by performing unconditional or conditional jumps.
When executing commands unconditional jump the current sequence of commands is violated and a transition to the execution of another sequence of commands specified in the command occurs. For this transition, it is necessary to change the address of the request for the next command in the command counter.
X byte
JMP ADDR - Unconditional Jump. Control is transferred to the command whose address is specified in the second and third bytes of the jump command. (PC) ß [(BYTE3) (BYTE2)].
When executing commands conditional jump further selection of one of the sequence of commands depends on one of the four flags: zero (Z), sign of the result (S), parity (P), carry (C), i.e. first, the state of one of the four flags of the MP is checked for execution of the specified in the command conditions, and then the command is executed. If the condition is fulfilled, the transition to a new address is carried out, otherwise the next command is executed. For the convenience of programming, conditions are checked for single and zero values of the flags CY (C), Z, S, P. The mnemonic of conditional jump commands is formed by adding the letter J (condition) to the name of the condition, and then the address is indicated where to jump if the condition is satisfied ...
All commands are 3 bytes.
The transition conditions are given in table 1
Table 1
Commands for calling subroutines and returning from them, software interrupt
X byte
CALL ADDR - unconditional call of the subroutine at the address loaded into the program counter;
Single byte
RET - return from the subroutine unconditional;
RSTN - call interrupt routine. (N is the number of the interrupting program)
Programming
Assembly language is a machine-oriented programming tool. The assembly language program is called the original.
An assembler translates a source program in symbols into binary machine codes. Such a program is called object, it can be loaded into memory for execution.
The program is developed in the form of a sequence of sentences called operators assembly language. Each operator is written on one separate line, and after translation generates one machine command... The operator line has four fields:
Label field;
Operation code field;
Operand field;
Comment field.
Label field is a conventional name or a set of characters starting with a specific letter. A colon must be placed after the label name. A label is assigned to a command in those cases when it is necessary to return to it during program execution (return by label). The return label name is written in the conditional and unconditional branch command. You cannot write the same label in multiple statements. Only those operators to which there is a reference from other operators of the program are marked with labels.
Code field operations used to mnemonic the opcode of a command. The mnemonic is separated from the operands by at least one space. Most of the mnemonics are abbreviations of the English words that characterize the main functions of the team. The adjacent field to the right is separated by at least one space.
V operand field provides information about the data on which operations are performed. The operands are names of registers and register pairs, labels or direct data. For conditional and unconditional jump commands, this field stores the name of the return label.
Comment field begins with ";". Place a description of the operator's purpose. This field has auxiliary functions and is used only by the programmer when writing a program.
All statements are written using ASCII (American Standard Code for Information Interchange) characters.
During translation, the assembler assigns the value 0800H to its address counter; the first command or data byte will be located at this address in the program.
Fundamentals of programming MP devices (Lecture)
LECTURE PLAN
1.Classification of microprocessor commands
2.Types of addressing
3. Structure and formats of commands MP KR580VM80
1.Classification of microprocessor commands
As already noted, the fundamental advantage of MP is programmability. This means that by supplying the input of the MP command, it is possible to provide the desired sequence of operations, i.e. implementation of a certain algorithm. The algorithm of the problem being solved can be as complex as you want, it is only necessary that this algorithm be divided into steps in accordance with the system of commands of the MP. Therefore, the system of commands is important not only from the point of view of what the MP can do, but also how the algorithm is executed. The presence or absence of a team or group of teams can significantly affect the choice of an MP for a particular application.
The classification of MT teams is shown in Figure 8.
According to the number of memory cells required to accommodate one instruction, one, two or three word instructions are distinguished. Two or three word instructions require two or three memory access cycles to retrieve, respectively.
In many cases, in particular when comparing an MP with a similar architecture, it is useful to classify commands according to the architectural characteristics of the MP.
From a functional point of view, teams are divided into three large groups: transmission, control and data processing. Let us consider in detail the main commands used in MT, using the classification by functional characteristics. We will designate the command names with Russian words indicating the meaning of the operations performed.
Data transfer commands provide a simple transfer of information without performing any processing operations. The commands of this group are divided into commands related to memory access, register access commands and input / output commands.
Memory-related commands include:
REMEMBER(WRITE), by which the contents of the register are written to the memory location.
In commands related to the transfer of a byte or word, the number of a specific register, the address of the memory cell and, if necessary, the number of the memory module must be indicated.
The commands associated with accessing registers must indicate the number of the source of information and the number of the result register. This subgroup of data transfer commands includes the commands:
DOWNLOAD DIRECTLY the constant specified in the command code is written to the register;
FORWARD, by which the contents of one register are transferred to another.
I / O commands include:
Enter, some of which the content of the input device is sent to the internal register of the MP;
OUTPUT, which contains the contents of the internal register of the MP (usually the accumulator) is sent to the output device.
Control Commands , often called jump commands, allow you to perform various actions in accordance with the meaning of external signals or conditions generated within the system. All control commands are divided into unconditional and conditional jump commands.
Unconditional jump commands include:
UNCONDITIONAL TRANSITION(BP), according to which the contents of the address field of the BP command are written to the program counter, i.e. the transition in the program to the address specified in the command is provided;
UNCONDITIONAL RETURN WITH REFUND(transition to the subroutine), according to which the new content is written to the program counter (the address of the first command of the subroutine), but unlike the PSU memory command, the state of the program counter and some other registers is saved. When the subroutine is executed on its last RETURN command, the contents of the program counter and all registers are restored.
Conditional branch instructions check the status of any bit of a register, flag flip-flop, or other parameter. It depends on the result of the check whether the transition will be performed or not. Usually, a branch is performed if the result of the check matches the condition specified in the command. This subgroup of control commands includes:
CONDITIONAL TRANSITION(UE) at the address In the UE command code, the checked condition is necessarily indicated, for which the MT uses the zero or non-zero value of the result, the positive or negative sign of the result, the presence or absence of carry signals, overflows, etc. When the condition is met, the contents of the address NC command fields, i.e. the transition in the program to the address specified in the command is provided. If the condition is not met, control is transferred to the next program command;
CONDITIONAL RETURN WITH REFUND, which differs from the UNCONDITIONAL JUMP WITH RETURN command in that the transition to the subroutine occurs only when the specified condition is met.
Usually, the MP instruction system includes a few more auxiliary commands that allow you to control the state of registers or triggers affecting the execution of conditional transitions, for example: SET FLAG, RESET FLAG, SET HIGHEST BATTERY DISCHARGE, RESET HIGH DISCHARGE and DRY BATTERY.
Data processing commands are divided into arithmetic and logical. Arithmetic includes:
ADD the contents of two registers or a register and a memory cell;
SUBSTITUTE from the contents of a memory cell or register contents of a register;
INCREASE BY 1(INCREMENT) the contents of a memory cell or register (stack pointer, index register, accumulator);
DECREASE BY 1(DECREMENT) the contents of a memory cell or register;
ADD FOR TRANSFER, along which the addition is performed taking into account the state of the carry trigger. This makes it easy to organize the processing of long numbers;
DEDUCTION FOR A LOAN;
SHIFT the contents of a memory cell or register (usually one bit).
The subgroup of logical commands includes commands:
AND(LOGICAL MULTIPLIED), by which the conjunction operation is performed between the contents of two registers or a memory cell and a register;
OR(LOGICALLY ADD), according to which a disjunction operation is performed between the contents of two registers or a memory cell and a register;
UNEQUALITY, by which a bitwise comparison of the contents of two registers or a memory cell and a register is made;
INVERSION the contents of a memory cell or register.
2.Types of addressing
One of the most important architectural characteristics of an MP is a list of possible ways to access memory or video addressing. IP addressing capabilities are essential from two points of view.
First, a large amount of memory requires a large address length, since an n-bit address allows you to access memory with a capacity of 2n words. Typical 8-bit words MP make it possible to directly access only 256 memory cells, which is clearly not enough. If we take into account that memory access is the most common operation, then it is obvious that the efficiency of using the MP is largely determined by the methods of addressing a large volume of memory with a small bit width of the MP.
Secondly, for the convenience of programming, it is desirable to have a simple system for generating data addresses when working with arrays, tables and pointers. Let's look at ways to solve these problems.
If the address field of the command is limited and insufficient for direct access to any memory cell, then the memory in such cases is divided into pages, where 2n memory cells are considered a page.
To reconcile the address field of a small-bit command with a large-volume memory (to solve a “page” problem), the MP uses different kinds addressing:
Direct addressing to the current page ... With this addressing, the program counter is divided into two fields; the higher digits indicate the page number, and the lower ones indicate the address of the cell on the page. The address field of the command contains the address of the cell on the page, and the address of the page must be set in some other way, for example, using a special command.
Direct addressing using a page register. The MP must provide for a programmable page register loaded with a special command. This register adds several bits to the instruction address field, which are necessary for addressing the memory coves.
Direct addressing using double words. To increase the length of the address field of the command, an additional word is allocated for the address (and if necessary, then two).
Addressing relative to the program counter. The address field of the command is treated as a signed integer, which is added with the contents of the program counter to form the executive address. This way of relative addressing creates a floating page and makes it easier to move programs in memory.
Addressing relative to the index register. The executive address is formed by summing the contents of the index register and the address field of the instruction, considered as a signed integer. The index register is loaded with special commands.
Indirect addressing ... With indirect addressing, the address field of the command indicates the address on the current page at which the executive address is stored. In this case, an additional bit is required in the command field - a sign of indirect addressing. The executive address can be stored not in a memory location, but in a register general purpose... In this case, indirect addressing is called register.
3. Structure and formats of commands MP KR580VM80
The MP command system of the KR580VM80 series contains commands in three formats: single-byte, double-byte and three-byte.
The content of the first byte indicates the command format, operation code, addressing type and registers or register pairs, if they are involved in the operation. It is impossible to specify the specific bits that are allocated for the first three of the specified components of the command, because they can be in any bits of the command. But, despite this, we will consider that they are encoded as one field, which is called the field of the opcode. The format options for the first command byte are shown in Figure 9.
If registers are involved in the operation, then one or two of them can be specified in the first byte of the command. In this case, quite definite bits are assigned to the register numbers in the command field: the three least significant bits (b2 - b0) encode the number of the source register containing the operand, and the three middle ones (b5 - b3) - the number of the receiver register, into which the result of the operation is sent. when both or one of these registers are not involved in the operation, the corresponding bits are used for the operation code.
The following encoding of registers is adopted:
000 - register B, 100 - register H,
001 - register C, 101 - register L,
010 - register D, 110 - memory cell,
011 - register E, 111 - battery A.
Code 100 is a sign of indirect memory addressing using a 16-bit address located in registers H and L. Depending on the location of this code in the instruction, the reference to the corresponding memory location is performed either for the operand, or for recording the results of the operation.
A number of MT commands provide for the processing or transmission of double-length numbers. In these cases, pairs of registers B and C, D and E or H and L are combined into 16-bit registers numbered 00.01 and 10, respectively. Bits b2 and b1 (register-source), b5 and b4 (register-destination), and bits b0 and b3 are used to indicate the operation code for the numbers of register pairs in commands.
The two-byte commands in the MP include commands with direct addressing of the I / O command. Accordingly, the second byte of the command of this group contains an 8-bit operand or an 8-bit address of an input or output device.
In three-byte instructions, the second and third bytes contain 16-bit addresses (in instructions with direct addressing) or 16-bit operands (in instructions for loading register pairs and the stack pointer).
After the execution of each operation aALU, five features are generated, the values of which can affect the execution of subsequent commands for processing information and conditional transfer of control. However, it should be borne in mind that different commands affect individual features in different ways.
For the convenience of saving and restoring the state of the MP during interrupts and transition to subroutines, all the indicated signs are stored in a special register - the register of signs. The location of signs in the bits of the register is shown in the table.
where S is the sign of the "sign" (takes the value of the highest bit
result);
Z is a sign of a zero result;
АС - a sign of an auxiliary transfer (if there is a transfer
between the byte tetrads, then AC = 1, otherwise AC = 0;
Р - sign of evenness of the result (if the number of ones in a byte
the result is even, then P = 1, otherwise P = 0);
С - sign of transfer or borrowing (if, when executing the command
When there was a transfer from the senior category or a loan to the old
the first bit then C = 1, otherwise C = 0).
Note: For commands of logical multiplication, the sign of the auxiliary transfer AC takes the value of the fourth bit of the result.
Completely the command system of the MP series KR580VM80 is given in the appendix of the textbook "Microprocessors and microprocessor systems". In the same place, for each command, it is indicated how, after its execution, the value of each sign changes: it is set in accordance with the result of the operation (+), does not change (-), is reset to zero (0) or set to one (1).
In general, a command should contain the following information:
–Operation code indicating the operation to be performed by the MT;
–Addresses of two operands (addends, subtracted, etc.). If any of the operands is a constant, then the value of the operand itself can be specified in the command instead of its address. However, this circumstance must be reflected in the operation code, so that the MT would use the appropriate part of the command with the specified designation;
–Address of the memory cell into which the result of the operation should be placed;
–Address of the next command.
Those. the command is generally a four-address command; however, this command structure results in a longer command format, which in turn entails a more complex processing and processor structure. Therefore, in MP technology, the most widespread are unaddressed and unicast commands that allow you to build a simple processor. However, when performing complex operations, various command formats are used.
In the instruction set of the MP series 580, there are single-byte, double-byte and three-byte commands.
Information about the method of addressing the command being executed is contained in the opcode of the first byte of the command.
To speed up calculations, some operands are stored in the RON block. Instructions working with these operands use shortened address codes (register addressing).
These commands allow you to exclude comparatively long cycle access to RAM and thereby significantly increase the speed of operations. Due to the limited capacity of the RON and when working with a large data array, other addressing methods are used, which allow accessing the operands located in the memory external to the MP. The most common is register indirect addressing, which uses the HL register pair.
logical OR, addition modulo 2 (Exclusive OR);Logic instructions allow you to compute basic logic functions from two input operands bit by bit. In addition, the AND operation is used to forcibly clear the specified bits (a mask code is used as one of the operands, in which the bits to be cleared are set to zero). The OR operation (OR) is used to forcibly set the specified bits (as one of the operands, a mask code is used, in which the bits that require setting to one are equal to one). The XOR operation is used to invert the specified bits (a mask code is used as one of the operands, in which the bits to be inverted are set to one). The instructions require two input operands and form one output operand.
Shift commands allow you to bitwise shift the operand code to the right (towards the low order bits) or to the left (towards the high order bits). The type of shift (logical, arithmetic, or cyclic) determines what the new value of the most significant bit (when shifting to the right) or least significant bit (when shifting to the left) will be, and also determines whether the previous value of the most significant bit (when shifting to the left) will be saved somewhere or the least significant bit (when shifted to the right). For example, with a logical shift to the right, the most significant bit of the operand code is set to zero, and the least significant bit is written as a carry flag to the processor status register. And with an arithmetic shift to the right, the value of the most significant bit remains the same (zero or one), the least significant bit is also recorded as a carry flag.
Cyclic shifts allow the bits of an operand to be shifted in a circular fashion (clockwise when shifted to the right, or counterclockwise when shifted to the left). In this case, the carry flag may or may not be included in the shift ring. The carry flag bit (if used) stores the value of the most significant bit when cycled to the left and the least significant bit when cycled to the right. Accordingly, the value of the carry flag bit will be overwritten in the least significant bit when cycling to the left and in the most significant bit when cycling to the right.
For example, in Fig. 3.12 shows the actions performed by the commands of shift to the right.
Bits and operand check commands are for setting or clearing bits status register processor depending on the value of the selected bits or the entire operand as a whole. The command does not generate an output operand. Operand check command ( TST) checks the entire operand code as a whole for equality to zero and for sign (for the value of the most significant bit), it requires only one input operand. The Bit Check Instruction (BIT) only checks individual bits that are selected using a mask code as the second operand. In the mask code, the checked bits of the main operand must correspond to ones.
Rice. 3.12.
Finally, the commands for setting and clearing bits status register processor (i.e. flags) allow you to set or clear any flag, which is very convenient. Each flag usually corresponds to two commands, one of which sets it to one, and the other resets it to zero. For example, carry flag C (from Carry) would correspond to CLC (clear) and SEC or STC (set).
3.3.4. Jump commands
Jump commands are designed to organize all kinds of loops, branches, subroutine calls, etc., that is, they disrupt the sequential flow of the program. These commands write a new value to the command counter register and thus cause the processor to jump not to the next command in order, but to any other command in the program memory. Some jump commands provide further return back to the point from which the transition was made, others do not provide for this. If return is provided, then the current processor parameters are saved on the stack. If no return is provided, then the current processor parameters are not saved.
Jump commands without refund are divided into two groups:
- commands unconditional branching;
- commands conditional jumps.
These commands use the words Branch(branching) and Jump(bounce).
Commands unconditional branching cause a jump to a new address regardless of anything. They can cause a jump by a specified amount of offset (forward or backward) or to a specified memory address. The offset value or the new address value is specified as an input operand.
Commands conditional jumps they cause a transition not always, but only when the specified conditions are met. These conditions are usually the values of the flags in the processor status register ( PSW). That is, the transition condition is the result of the previous operation that changes the values of the flags. There can be from 4 to 16 such transition conditions in total. Several examples of commands conditional jumps:
- transition if equal to zero;
- transition if not equal to zero;
- jump if there is overflow;
- jump if there is no overflow;
- transition if greater than zero;
- jump if less than or equal to zero.
The comparison command ( CMP) preceding the command conditional jump(or even several commands conditional jumps). But flags can be set by any other command, for example forwarding command data, any arithmetic or logical command... Note that the jump commands flags do not change, which just allows you to set several jump commands one by one.
Sharing multiple conditional and unconditional branching allows the processor to execute branched algorithms of any complexity. For example, in Fig. 3.13 shows the branching of the program into two branches with the subsequent connection, and in fig. 3.14 - Forking into three branches followed by a connection.
Jump commands with a further return to the point from which the jump was made, are used to execute subroutines, that is, auxiliary programs. These commands are also called subroutine call commands (common name is CALL). The use of subroutines allows to simplify the structure of the main program, make it more logical, flexible, easy to write and debug. At the same time, it should be borne in mind that the widespread use of subroutines, as a rule, increases the program execution time.
Rice. 3.13.
Rice. 3.14.
Everything jump commands with backtracking assume unconditional branching (they do not check any flags). At the same time, they require one input operand, which can indicate both the absolute value of the new address and the offset added to the current value of the address. The current value of the command counter (current address) is saved before the jump is performed on the stack.
To return to the dial-peer